1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and method for driving the same.
2. Discussion of the Related Art
Until recently, cathode-ray tubes (CRTs) have been widely used as display-devices. Presently, much effort is being made to study and develop various types of flat panel displays, such as liquid crystal display (LCD) devices, plasma display panels (PDPs), field emission displays (FED), and electro-luminescence displays (ELDs), as a substitute for CRTs. These flat panel displays have been driven by an active matrix driving method in which a plurality of pixels arranged in a matrix configuration are driven using a plurality of thin film transistors therein. Among these active matrix type flat panel displays, liquid crystal display (LCD) devices and electroluminescent display (ELD) devices are widely used for notebook computers and desktop computers because of their high resolution, ability to display colors and superiority in displaying moving images.
In general, an LCD device includes two substrates that are spaced apart and face each other with a layer of liquid crystal molecules interposed between the two substrates. The two substrates include electrodes that face each other such that a voltage applied between the electrodes induces an electric field across the layer of liquid crystal molecules. The alignment of the liquid crystal molecules changes in accordance with the intensity of the induced electric field, thereby changing the light transmissivity of the LCD device. Thus, the LCD device displays images by varying the intensity of the electric field across the layer of liquid crystal molecules.
FIG. 1 is a schematic view illustrating an LCD device according to the related art.
Referring to FIG. 1, the LCD device includes a liquid crystal panel 1 and a driving circuit. The driving circuit includes gate and data drivers 2 and 4.
A liquid crystal panel 1 includes a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm crossing each other to define a plurality of pixels. Each pixel includes a thin film transistor T, a liquid crystal capacitor Clc and a storage capacitor Cst. The liquid crystal capacitor Clc includes a pixel electrode, a common electrode and a liquid crystal layer between the pixel and common electrodes. The storage capacitor Cst includes the pixel electrode and a previous gate line as two storage electrodes.
A data driver 4 supplies data voltages to the data lines DL1 to DLm. A gate driver 2 supplies gate voltages to the gate lines GL1 to GLn.
On-level gate voltages are sequentially applied to the gate lines GL1 to GLn to enable the gate lines GL1 to GLn and the thin film transistors connected to the gate lines GL1 to GLn. When the thin film transistors T are turned on, the data voltages are applied to the pixels through the data lines DL1 to DLm. A common voltage Vcom is applied to the common electrode. Accordingly, an electric field is applied to the liquid crystal and the light transmissivity of the liquid crystal layer changes, thereby displaying images.
A power supply 6 generates driving voltages for the driving circuit and the common voltage Vcom for the liquid crystal panel 2.
FIG. 2 is a schematic view illustrating a connection between a liquid crystal panel and a driving circuit according to the related art.
Referring to FIG. 2, a data driver (4 of FIG. 1) includes a plurality of data drive ICs 14a gate driver (2 of FIG. 1) includes a plurality of gate drive ICs 12a. The plurality of the ICs 14a are ormed on a plurality of data TCP (tape carrier package) films 14b and the plurality of gate drive ICs 12a are formed on a plurality of gate TCP films 12b. The data drive IC 14a is connected to the liquid crystal panel 10 and a PCB (printed circuit board) 16 through the data TCP film 14b with a TAB (tap automated bonding) method, and the gate drive IC 12a is connected to the liquid crystal panel 10 through the gate TCP film 12b with a TAB method. Alternatively, the data and gate drive ICs 14a and 12a may be directly formed on the liquid crystal panel 10 with a COG (chip on glass) method.
The data and gate drive ICs 14a and 12a are supplied with data signals and control signals through signal lines on the PCB 16. To do this, the data TCP film 14b is directly connected to the PCB 16, and the gate TCP film 12b is connected to the PCB 16 through a plurality of LOG (line on glass) lines 11 located along a peripheral portion of the liquid crystal panel 10. The LOG lines 11 connects the gate TCP film 12b and the data TCP film 14b to transfer signals for the gate drive ICs 12a. 
The LOG lines 11 include source voltage (Vdd and Vcc) lines, a ground (GND) line, a gate enable (GOE) signal line, a gate start pulse (GSP) line, a high-level gate voltage (VGH) line and a low-level gate voltage (VGL) line.
To turn on/off the thin film transistors (T of FIG. 1), the gate drive IC 12a supplies the high/low-level (on/off-level) gate voltages to the gate lines according to a timing sequence.
FIG. 3 is a circuit diagram illustrating pixels according to related art.
Referring to FIG. 3, a storage capacitor Cst of each pixel uses a previous gate line as a storage electrode.
When a high-level gate voltage is supplied to an (n+1)th gate line GLn+1 for an (n+1)th charging period (horizontal scanning period), data voltages are charged to the storage capacitors Cst on the corresponding horizontal line i.e., an (n+1)th horizontal line. The data voltages charged to the storage capacitors Cst ripples due to a variation of a low-level gate voltage supplied to the previous gate line GLn during the (n+1)th charging period. This may generate a flicker and degrade the image quality of the LCD device.